Delivered crisis intervention support on a late project for a PCI card design. The system did not send correctly formatted data to the analog spatial light modulator (SLM). Re-architecting the design yielded a functional platform for testing of the SLM.
Developed several high speed (65 Mhz) FPGA based, time-sequential color framebuffer controllers for Displaytech Inc.’s ferroelectric liquid crystal (FLC), time sequential color, spatial light modulators. Controllers interfaced to VRAM and SDRAM memory. FPGA designs done with VHDL, Exemplar Logic Leonardo Synthesis software, and Xilinx M1 P&R software. Continued development for customer on next generation FLC Display controller(s).