Who knew that transistors would have such a transformative power over our daily lives? We carry billions of them around in our pocket, on our wrist, in our computers. They are ubiquitous but also invisible.
I have rescued a few designs during my 25+ years at the helm of Aspen Logic's FPGA/ASIC contracting business. Reasons abound for the causes of the failures but there are three areas that need consistent focus:
- Designers give little up front thought to logic reset which leads to insidious, hard to find bugs
- Management typically assigns a cost of $0 to bugs because FPGA devices are re-programmable so no time is allocated in the schedule for squishing them
- Lack of a road map for features and fixes which makes decision making on large design efforts difficult
The typical article on metastability in the flip flop synchronizer (used for clock domain crossing) delivers volumes about the MTBF ("Mean Time Between Failure") equation but falls short when explaining practical ways to manage the failure rate.