Just An Opinion

Hit the Road(map) Jack

Tim Davis — Sat, 17 Mar 2018 01:25:29 +0000

First, with apologies to the awesome Ray Charles and his hit song, Hit the Road Jack, from which I borrowed this blog's catchy title, I want to introduce the idea of creating a roadmap for your next FPGA development project as a simple way to keep every project team's eye-on-the-target(s).

The Transistor Effect

Tim Davis — Fri, 02 Mar 2018 05:20:18 +0000

Who knew that transistors would have such a transformative power over our daily lives? We carry billions of them around in our pocket, on our wrist, in our computers. They are ubiquitous but also invisible.

Bugs? Not in my schedule please.

Tim Davis — Fri, 24 Feb 2017 17:44:00 +0000

I have rescued a few designs during my 25+ years at the helm of Aspen Logic's FPGA/ASIC contracting business. Reasons abound for the causes of the failures but there are three areas that need consistent focus:

Designers give little up front thought to logic reset which leads to insidious, hard to find bugs
Management typically assigns a cost of $0 to bugs because FPGA devices are re-programmable so no time is allocated in the schedule for squishing them
Lack of a road map for features and fixes which makes decision making on large design efforts difficult

Verifying Validation and Validating Verification

Tim Davis — Fri, 22 Oct 2010 04:22:00 +0000

People (I guess we classify engineers as people) have always talked about verification and the "testing" of a piece of hardware to see if it works as the "same thing". Unfortunately for us there is a movement within international standards bodies (dating back centuries) to have us believe that there are really two types of testing: verification and validation.

Is your head spinning?

FPGA Mezzanine Card (FMC) Standard

Tim Davis — Fri, 05 Mar 2010 09:48:00 +0000

You of course know it by ANSI/VITA 57 since you are an engineer. Or maybe you do not get regular updates from the VMEBus International Trade Association and just know that Xilinx and their board makers, like Tokyo Electron Device, use FMC connectors.

But what's in it for me?

A Font Of Wisdom For You

Tim Davis — Wed, 18 Nov 2009 08:41:00 +0000

ASIC Prototyping: Is it design or verification?

Tim Davis — Wed, 11 Nov 2009 04:37:00 +0000

Why does the ASIC developer need ASIC prototyping? Is it to learn how their existing design will function with a new interface -- say to DDR3 memory? Is it to completely verify their ASIC design prior to tapeout?