Review and Locate Bugs in 4-lane JESD204B Interface Design

AspenLogic — Thu, 07 Oct 2021 23:21:58 +0000

Accepted the task of reviewing and locating bugs for defense contractor in an overdue digital synthesizer design using a 4-lane JESD204B interface comprising a Xilinx DDS core, Xilinx JESD204B TX core (hosted in an Artix XC7A200T-1FFG1156I FPGA), a TI LMK04828 Clock Generator and TI DAC39j84 Quad, 2.8-GSPS Digital to Analog Converter. Re-wrote the startup state machine for initializing the system (not as easy as it sounds) and provided analysis of the entire design for management.

High Speed DDS to JESD204B DAC Interface

AspenLogic — Sun, 04 Mar 2018 00:43:49 +0000

Accepted the task of reviewing and locating bugs in an overdue digital synthesizer design using a 4-lane JESD204B interface comprising a Xilinx DDS core, Xilinx JESD204B TX core (hosted in an Artix XC7A200T-1FFG1156I FPGA), a TI LMK04828 Clock Generator and TI DAC39j84 Quad, 2.8-GSPS Digital to Analog Converter. Re-wrote the startup state machine for initializing the system (not as easy as it sounds) and provided analysis of the entire design for management.