Network Process SPI-3 Gasket

AspenLogic — Sun, 04 Mar 2018 00:09:11 +0000

Delivered Xilinx Spartan™ IIE FPGA to connect the Vitesse (Sitera) IQ2x000 network processor to a custom SPI-3 interface requiring link and phy interfaces for the receive path. Extensive testing yielded a design without defects that was delivered on-time and months before the customer (Sun Microsystems) needed the device for in-system integration.

Focus Bus to CrossStream Bus Gasket

AspenLogic — Sun, 04 Mar 2018 00:08:29 +0000

Delivered Xilinx Virtex™ FPGA to connect Vitesse IQ2000 network processor and VSC870/VSC880 components by translating between the Focus bus and CrossStream bus protocols of the two devices.